VN-Spec

Product Detail

VN-Spec requirement traceability and impact analysis tool extends TransEDA’s leading-edge Verification Navigator tool suite to cover the specification domain. More than a point tool, VN-Spec brings a solid methodology for requirements traceability in design and verification flows to project teams needing a thorough view of their SoC flow. For this reason, VN-Spec is particularly suited for organizations that need to comply with demanding standard, such as DO-254 in the aeronautics market.

Integration in Existing Flows

VN-Spec is straightforward to integrate into any existing design flow, and brings rapid ROI when used on complex projects. As the tool does not maintain a large database, it is lightweight and fast-to-deploy. On designs already in progress for which specifications have been formalized into identifiable requirements, VN-Spec easily adapts to existing formalism to provide specification coverage with no overhead.

File Types and Tool Interfaces

VN-Spec reads specifications from common formats such as Word®, Excel®, FrameMaker®, PDF®, and others, or standard ASCII text files. It identifies all requirements matching a given template, and traces them in the files that have a declared coverage relation to the initial specification documents.

VN-Spec supports both Verilog and VHDL languages. In addition, VN-Spec can be easily enhanced to read other languages or file types. Interfaces to third-party EDA tools (design entry, coverage analysis, verification management, etc.) are available to perform requirement tracing across various stages of the design flow. Moreover, because VN-Spec is based on the same Reqtify technology than its sister tool dedicated to software development requirement traceability, it can also accept models in C, C++, ADA, SDL, etc. Additional interfaces to UML and modeling tools (Rose, Rhapsody, Statemate, Simulink, Matlab…) , as well as configuration management tools (CVS, Clearcase…) make VN-Spec suitable to trace requirements at the system level, throughout both hardware and software development flows.

Impact Analysis

A common SoC design process issue is that specifications keep evolving while implementation has started. As a result, it is critical to accurately evaluate the impact of late changes on engineering resources to modify files and re-run verification tasks.

VN-Spec provides this information at a glance and is also able to pinpoint all documents that must be updated when an ECO impacts design functionality.

Automatic Report Generation

VN-Spec includes a comprehensive graphical user interface (GUI) which allows for easy navigation, data sorting, and data filtering. In addition, VN-Spec can automatically create any kind of report and document related to requirements: specification coverage spreadsheet, dependency graph, test coverage matrix, and many others.

Reports are user-customizable through a simple template file and can adhere to any company documentation or report format.

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